Adapter base for receiving electronic test objects

ABSTRACT

The invention relates to an adapter base for receiving electronic test objects (DLTT) comprising an outer group (array) of contact pins ( 26 ) that pass through the base from the upper side to the lower side, as well as an inner matrix ( 38 ) that consists of contacts ( 36 ) that protrude only on the lower side corresponding to an area ( 28 ) on the upper side which presents no contacts. Each contact pin ( 26 ) is connected to a series connection ( 30 ) embodied in the adaptor ( 24 ) and constituted by a switching transistor ( 32 ), as well as at least one capacitor ( 34 ) that via a control signal can be connected and disconnected by means of the gate (G) of the switching transistor ( 32 ), the gate being connected to a corresponding contact ( 36 ) on the lower side.

PRIORITY CLAIM

This is a U.S. national stage of application No. PCT/EP00/02995, filedon Apr. 5, 2000. Priority is claimed on that application and on thefollowing application: Country: Germany, Application No.: 299 06 730.0,Filed: Apr. 16, 1999.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The invention relates to an adapter base for receiving electronic testobjects (DUT=device under test), which has an outer group (array) ofcontact pins led through from its top side to the underside, and also aninner matrix of contacts which are led out only on the underside and towhich a region free of circuitry corresponds on the top side.

2. Discussion of the Prior Art

In order to test objects, in particular compact electronic componentshaving a multiplicity of terminals, it is known to clamp these fixedlyon a zero insertion force base (ZIF=Zero Insertion Force) which isfixedly connected to a board by its contacts projecting on theunderside. The difficulty is that the configuration of the object to betested varies within a series or from manufacturer to manufacturer, sothat only by expending effort and devoting a great deal of time is itpossible for the integrated circuit that is to be tested to be connectedup in accordance with the requirements. only with the aid of anindividually produced transition circuit is it possible for electricalsignals and supply voltages to be allocated correctly to the individualcontacts.

SUMMARY OF THE INVENTION

The invention is based on the object of remedying this and providing anadapter base for receiving electronic test objects which, within anextremely short time, for all the contact pins simultaneously ascertainsthe electrical contact of the integrated circuit to be tested andperforms automatic switching at the contact pins in accordance with theobject to be tested, to be precise depending on whether the contact pinsare intended to transmit electronic signals or serve as supply contacts.

In the case of an adapter base of the design explained in theintroduction, this object is achieved according to the invention byvirtue of the fact that each contact pin is connected to a seriescircuit which is formed in the adapter and comprises a switchingtransistor and at least one capacitor which, by means of a controlsignal, can be connected in and disconnected by the gate of theswitching transistor, said gate being connected to an assigned contacton the underside.

The fact that each contact pin is connected to additional electroniccomponents (switching transistor and capacitor) affords the possibility,depending on the required operating mode of the contact pin, oftransmitting signals or connecting the contact pin to operating voltageor ground. By means of a control signal supplied by a control unit, e.g.computer or PC, the gate of the switching transistor is opened orclosed, so that the capacitor is connected in as required.

It is advantageous if two capacitors having different capacitances areprovided.

In another embodiment of the invention, the contact pins are designed asspring pins, which ensure a reliable connection between the solderinglands of the board accommodating the components to be tested and thecontacts of the adapter base.

If the adapter base has a multilayer hybrid structure, a highly compactdesign is possible which allows a multiplicity of components to beaccommodated in the base. Thus, it is possible for instance toaccommodate 225 transistors and 500 capacitors, for example, in aplurality of layers.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention is explained below using an exemplary embodimentillustrated in the drawing in which:

FIG. 1 shows a schematic view of an adapter base according to theinvention for testing an object,

FIG. 2 shows the top side of the adapter base from FIG. 1,

FIG. 3 shows the underside of the adapter base, and

FIG. 4 shows the circuitry of a contact pin (spring pin) according tothe invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

FIG. 1 shows the schematic side view of a zero insertion force base 10(ZIF base), on the top side of which the test object 14 (DUT=deviceunder test) can be fixed by means of a clamping clip 12. The zeroinsertion force base 10 is fixed on a board 16 having an outer group(array) of soldering lands 18 on its underside, each of which solderinglands is connected, in a manner that is not illustrated, to a terminal20 on the underside of the zero insertion force base 10.

The adapter base 24 according to the invention is fitted on a furtherboard 22. This adapter base has an outer group (array) of contact pins26—which can be seen in FIG. 2 which are led through as spring pins fromthe top side to the underside of the adapter base 24. The configurationof this array of contact pins 26 corresponds exactly to the array ofsoldering lands 18 of the board 16 receiving the test object 14. In thepresent case, the adapter base 24 is square, the array of contact pins26 being formed on all four edges, whereas the hatched, square centralregion 28 is free of circuitry.

The invention makes provision, in accordance with the schematicillustration in FIGS. 1 and 4, for each contact pin 26 in the adapterbase 24 to be connected to a series circuit 30 formed from additionalelectronic components, comprising a switching transistor 32 and twocapacitors C₁ and C₂.

The terminal contact 36 of the gate G of the switching transistor 32 isled out from the underside of the adapter base 24 and forms, with theother gate terminals 36, an inner matrix 38 of contacts whichcorresponds to the region 28 which is free of circuitry and is providedon the top side of the adapter base 24.

Depending on the electrical driving of the contact pins 26, the lattercan transmit digital or analog signals or be connected as supplyterminal for operating voltage. Specifically, if a contact pin 26carries supply voltage, the corresponding gate G of the assignedswitching transistor 32 receives control voltage, so that saidtransistor is closed and the two capacitors 34 are linked to the contactpin 26 in a low-resistance manner. Conversely, if a signal istransmitted via the contact pin 26, for example with frequencies of upto 100 MHz, the gate G of the switching transistor 32 remains open, sothat the capacitors 34 are not connected in.

The switching transistors 32 are driven by means of control signalssupplied by a control unit, for example a computer or a PC.

As already mentioned, the adapter base 24 according to the invention mayhave a multilayer hybrid structure in a ceramic design, so that amultiplicity of components can be accommodated. In the exemplaryembodiment illustrated in FIGS. 2 and 3, three layers are provided, oneof which receives 225 transistors 32, while in each case 550 capacitors34 are accommodated in two further layers.

Thus, while there have been shown and described and pointed outfundamental novel features of the present invention as applied to apreferred embodiment thereof, it will be understood that variousomissions and substitutions and changes in the form and details of thedevices illustrated, and in their operation, may be made by thoseskilled in the art without departing from the spirit of the presentinvention. For example, it is expressly intended that all combinationsof those elements and/or method steps which perform substantially thesame function in substantially the same way to achieve the same resultsare within the scope of the invention. Substitutions of elements fromone described embodiment to another are also fully intended andcontemplated. It is also to be understood that the drawings are notnecessarily drawn to scale but that they are merely conceptual innature. It is the intention, therefore, to be limited only as indicatedby the scope of the claims appended hereto.

What is claimed is:
 1. An adapter base for receiving electronic testobjects, comprising: a base member; an outer group (array) of contactpins led through from a top side of the base member to a underside ofthe base member; an inner matrix of contacts which are led out only onthe underside of the matrix and to which a region free of circuitrycorresponds on the top side; and a series circuit connected to eachcontact pin formed in the adapter base member and comprising a switchingtransistor and at least one capacitor which, by means of a controlsignal, can be connected in and disconnected by a gate of the switchingtransistor, the gate being connected to an assigned contact on theunderside.
 2. An adapter base as defined in claim 1, wherein twocapacitors having different capacitances are provided in the seriescircuit.
 3. An adapter base as defined in claim 1, wherein the contactpins are spring pins.
 4. An adapter base as defined in claim 1, whichhas a multilayer, compact hybrid construction.